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Hardware Engineer

Location: San Francisco (San Francisco)         posted: 10.29.18

Interested candidates send resume to:  Verily Life Sciences LLC, PO Box 26184 San Francisco, CA 94126 Attn: V. Murphy.  Please reference job # below:

Hardware Engineer (San Francisco, CA) Design, develop, modify, &/or test hardware needed for various Verily Life Sciences projects. #1615.24846 Exp Incl: transistor-level schematic dsgn, layout, simulation & verification using Cadence Virtuoso; create func models in SystemVerilog or VerilogA; func modeling & analysis of sys level design tradeoffs, using Matlab or Python; physical dsgn for RF, analog, & mixed-signal circuits & guideing mask dsgners to create high quality layout; build test setups & performing laboratory characterization & chip debugging; analog/RF dsgn in deep submicron process nodes: 65nm or below; device physics & manufacturing processes; & scripting or programming lang.

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