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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 04.15.19

 

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]

 

JOB ID:                 4186396

               

JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineers in Cupertino, CA. Develop floorplan and top level design for power/performance/area reduction. Responsible for all aspects of timing: methodology, analysis, convergence, closure, and final signoff. Apply knowledge and understanding of detailed path analysis, chip floor planning and time budgeting, and background in deep submicron process technology. Work with process variation, various timing margins and derates, and detailed tool settings. Collaborate with Front End and Physical Design Engineers for timing changes related to constraint debug/updates and detailed specifications and validation of design changes. Execute timing runs, maintain and innovate scripts and infrastructure, and provide documentation for guidelines and specs. Circuit simulations to make sure circuit and routing robustness and reliability. Apply strong signoff ownership to ensure first silicon success.

 

CONTACT:

To apply, mail your resume & transcript(s) to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 4186396. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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