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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 02.03.20

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]

 

JOB ID:                 4219396

               

JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineers in Cupertino, CA. Responsible for Intellectual Property (IP) integration  and synthesis to generate netlist. Perform chip bring up and debugging.  Work on RTL simulation and debugging.  Execute IP integration and spec writing. Oversee RTL synthesis and netlist generation.  Utilize Static Timing Analysis (STA) timing closure.  Coordinate clock domain and reset domain crossing check and validation.  Work with Design For Test (DFT), Built-In Self-Test (BIST) insertion and Unified Power Format (UPF) generation.  Support Engineering Change Order (ECO) implementation.  Participate in silicon bring up and debugging.

 

CONTACT:

To apply, mail your resume & transcript(s) to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 4219396. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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