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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 03.16.20

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]

 

JOB ID:                 8733426

               

JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineers in Cupertino, CA. Generate block/chip level static timing constraints. Create floorplan including pin placement, partitions, and power grid. Develop and validate high performance low power clock network guidelines. Perform block level place and route and close the design to meet timing, area and power constraints. Generate and implement Engineering Change Orders (ECOs) to fix timing, noise, and Static/Dynamic voltage drop violations. Run physical design verification flow at chip/block level and provide guidelines to fix Layout vs Schematic/Design Rule Check (LVS/DRC) to other designers. Participate in establishing physical design methodologies for correct by construction designs. Assist in flow development for chip integration.

 

CONTACT:

To apply, mail your resume to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 8733426. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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