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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 03.23.20

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]

 

JOB ID:                 6042451

               

JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineers in Cupertino, California. Design Verification of Communications Chips, Wireless Technology System on Chip (SoC). Develop Object Oriented UVM Testbench infrastructure for SoC. Develop system level test plan for Wireless chipsets. Develop UVM compliant checkers, scoreboards, tests for ARM based SOC Sub-Systems. Debug RTL, generate meaningful debug information and work with DV and Design team on closing bugs. Develop complex reference model using System Verilog and UVM methodology of SOC sub-systems. Verify Low Power scenarios at block and Chip level. Setup Gate level Verification env and verify netlist. Develop UPF based low power test bench and verify power cycling features of SoC. Develop C based test suite to verify multi-CPU based SOC Infrastructure. Develop coverage model, complete checklists, and run xPROP simulations for DV closure.

 

CONTACT:

To apply, mail your resume & transcript(s) to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 6042451. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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