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Software Engineers & System Architect

Location: South Bay (San Jose)         posted: 05.22.20

Xilinx, Inc. in San Jose, CA seeks:

 

Senior Software Engineer (job code 81517). Des, dev, troubleshoot & debug sw progs …Admin Linux, UNIX, & Windows in a shared/enterprise env & writing automation in respective shell & scripting langs. Reqs incl. MS or foreign equiv. in CS, CE, Electrical Engg or related + 3 yrs rel exp or BS + 5 yrs prog rel exp.

Senior Software Engineer (job code 83681). Dev open source virtualization sols (Containers, VMs, & processor virtual platforms (QEMU)) to supp multi-processor env. Reqs incl. MS or foreign equiv. in CE, CS, Electrical Engg or related + 2 yrs rel exp.

Senior Software Engineer (job code 79836). Design, develop, troubleshoot & debug sw programs for enhancements and new products…Develop core sw infra-structure for Xilinx applications. Reqs incl. MS or foreign equiv. in CS, CE, Electrical Engineering or related or Bachelor’s degree + 5 yrs prog rel exp.

Senior Software Design Engineer (job code 80034). Des, dev, troubleshoots & debug sw progs …Dev sw & tools in supp of Xilinx des, infrastructure, & tech platforms for SOC & FPGA sols. Reqs incl. MS or foreign equiv. in Electrical Engg, Electronic Engg, CS, CE or related + 1 yr rel exp.

Senior Software Verification Engineer (job code 81895). Des, dev, troubleshoot & debug sw progs… creating sw tests/scripts to verify runtime libraries, test plans & cases... Reqs incl. PhD or foreign equiv. in CS, Electrical Engg or related or MS + 2 yrs rel exp.

Senior Design Engineer (job code 80589). Resp for des & anal high speed interfaces & power distrib networks. Reqs incl. MS or foreign equiv. in Electrical Engg or related + 2 yrs rel exp.

Senior Design Engineer (job code 82744). Def, des, veri, & doc ASIC dev. Reqs incl. MS or foreign equiv. in Electrical Engg or related + 2 yrs rel exp.

Sr. Systems Design Engineer (job code 82180). Enhance existing sw for system-level validation & verification of existing & new FPGA features. Reqs incl. MS or foreign equiv. in Electronics Engineering or related + 1 yr rel exp.

Senior CAD Engineer (job code 82361). Oversees def, design, verif, & doc for ASIC dev. Resp for CAD flow ownership & supp for STA-related CAD flows… Reqs incl. MS or foreign equiv. in Electrical Engg or related + 3 yrs rel exp or BS + 5 yrs prog rel exp.

System Architect (Emulation & Prototyping), (job code 81791). Enable Xilinx to further strengthen its position in the Emulation and Prototyping (E&P) market space. Reqs incl. BS or foreign equiv. in CS, Electrical Engg or related + 10 yrs prog rel exp.

 

Mail resume to Xilinx, Inc. Attn: Ask HR at 2100 Logic Drive, San Jose, CA 95124-3450. Must ref the relevant job code to be considered. EEO/AA/Vet/Disability Employer.

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