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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 06.01.20

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]

 

JOB ID:                 3974396

               

JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineers in CUPERTINO, California. Responsible for all aspects of timing including: timing methodology, timing analysis, convergence, and closure, and final signoff. Perform status timing analysis and timing convergence to ensure timing closure and convergence. Develop floorplan and top level design for power, performance, and area reduction. Perform noise analysis to ensure robustness of the design. Design circuit simulations to ensure circuit and routing robustness and reliability. Work with both Front End and Physical Design Engineers on timing changes related to constraint debug/updates as well as detailed specifications and validation of design changes. Execute timing runs, maintain and innovate scripts and infrastructure, and provide documentation for guidelines and specifications.

 

CONTACT:

To apply, mail your resume to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 3974396. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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