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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 06.29.20

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]

 

JOB ID:                 4471396

               

JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineers in Cupertino, California and various unanticipated locations throughout USA. Design Front-end hardware for graphics chips. Optimize designs at the Register-Transfer Language (RTL) to achieve aggressive power, area and timing goals. Use synthesis tools (DC, DCT/DCG) and Boolean transforms to optimize netlists for low-power. Use design techniques to fit into the allowed chip area. Create netlists that are logically equivalent to the RTL. Utilize static timing analysis (STA) to ensure delivery of a timing-clean netlist to physical design. Implement engineering change orders (ECOs). Use scripting to automate processes. Debug verification failures and provide RTL or tool-based solutions. Solve wire-dominant or cell-dominant congestion issues identified by the physical design team. Implement low-power design using specialized library cells. 

 

CONTACT:

To apply, mail your resume to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 4471396. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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