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Process Engineer (Multiple Positions)

Location: East Bay (Fremont)         posted: 09.09.20

Process Engineer (Multiple Positions), Lam Research Corporation, Fremont, CA. Responsible for performing professional process engineering research, design, development, modification, and evaluation. Support the company’s complex semiconductor capital equipment and systems, including radical etcher, plasma treatment, and photoresist ashing. Determine process approaches and parameters. Review and evaluate processes. Generate or direct process activities and verify accuracy of final documentation. Analyze and select components and equipment, as well as evaluate supplier capabilities. Design and conduct independent experiments or tests. Define problems and objectives, develop approach, analyze results and provide recommendations. Direct the implementation of required changes or modifications. Plan, conduct, and technically direct moderately complex projects. Write and analyze Action Requests/Equipment Changes Notices.

40 hrs/week, Mon-Fri, 8:30 a.m. - 5:30 p.m.

MINIMUM REQUIREMENTS:

Must have a Master’s degree in Chemical Engineering, Electrical Engineering, Physics, Chemistry, Materials Science or a related field, plus 2 years of experience in process engineering.

Of the required experience, must have 1 year of experience in at least 2 of the following: Design of Experiment (DOE); data analysis; semiconductor fabrication; and, plasma physics, plasma chemistry, or plasma reactors.

Of the required experience, must have 1 year of experience in at least 3 of the following metrology used in semiconductor processing: Transmission Electron Microscopy (TEM); Scanning Electron Microscopy (SEM); Critical Dimension SEM (CD-SEM); Focused Ion Beam (FIB); Atomic Force Microscopy (AFM); X-ray Diffraction (XRD); X-ray Photoelectron Spectroscopy; Emission Spectroscopy; Raman Spectroscopy; Spectroscopic Ellipsometry; Quartz PCI; and/or Fourier Transform Infrared Spectroscopy (FT-IR).

Of the required experience, must have 1 year of experience in at least 3 of the following: wafer cross section techniques; wafer fabrication processes; ion transport phenomena; dynamic random-access memory (DRAM); plasma etching; plasma simulation; semiconductor thin film deposition; Atomic Layer Deposition (ALD); 3D NAND Flash; Chemical Vapor Deposition (CVD); and/or Plasma Enhanced Chemical Vapor Deposition (PECVD).

Must have at least 1 year of experience in 1 of the following software: Matlab; Labview; JMP; Hybrid Plasma Equipment Model (HPEM); Mathematica; or Origin.

Experience may be gained while in graduate school.

To apply, mail resume to: ATTN: HR/LYanoska, 4650 Cushing Parkway, Fremont, CA 94538 and reference Job #0481.

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