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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 10.26.20

 

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]

 

JOB ID:                 7835462

               

JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineers in Cupertino, CA. Responsible for all aspects of Front End timing flows, working with design and integration teams on constraint generation/verification methodologies, and supporting the use of these constraints in various flows and tools. Work with design teams to understand and debug issues related to timing constraints, including compatibility across various tools (Static Timing Analysis, Synthesis, Place and Route, Clock Domain Crossing analysis) Develop and support methodologies, tools, and flows used in the verification of timing constraints, drive best practices across design teams. Develop and support tools for constraint generation and management for complex System on Chip designs. Facilitate methodology changes to improve Front End static timing analysis use case in the overall timing flow. Develop and support various netlist quality checks. Provide user training on flows and conventions, create documentation and help with guidelines/specs. Facilitate timing analysis handshaking between Front End and Physical Design engineering teams. Learn and deploy methods for mining and visualizing design timing progress and quality.

 

CONTACT:

To apply, mail your resume to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 7835462. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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