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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 01.19.21

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]

 

JOB ID:                 9523485

               

JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineer in Cupertino, California. Develop the scripts and utilities to control the design tools and analyze the design result. Write timing constraints in block-level and chip-level and clean-up the constraints for timing closure. Work with Physical Design team to discuss the Clock-Tree-Synthesis and the timing-critical logic issues. Work with RTL (Register Transfer Level) designers to capture the design intention and discuss implementation. Generate a netlist from RTL and check and improve the quality. Develop UPF (Unified Power Format) to implement the low-power design. Solve CAD flow-related issues with the CAD team. Integrate the released IPs and provide the feedback on the integration issues. Write a waiver file on synthesis and timing errors and warnings to monitor the status of the design quality.

 

CONTACT:

To apply, mail your resume to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 9523485. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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