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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 01.25.21

EMPLOYER:        Apple Inc.


JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]


JOB ID:                 9436470


JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineer in Cupertino, California. Create tests in SystemVerilog with Universal Verification Methodology (UVM). Create verification environment using UVM. Create Universal Verification Components (UVCs) for the testbench. Run simulations using Cadence or Synopsys provided simulators. Debug simulations using waveforms in simvision (.shm format) or Verdi (.fsdb format) debuggers. Read chip specifications in order to develop testplan for verification. Gate-level simulations. Code functional coverage and perform coverage collection and closure activities.



To apply, mail your resume  to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 9436470. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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