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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 03.29.21

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]


JOB ID:                 6989498


JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineers in Cupertino, California. Participate in efforts to establish CAD and physical design methodologies, chip floor plan, chip assembly and Place and Route (PnR) timing closure, power, and noise analysis and back end verification across multiple projects. Use floorplanning to find optimized bounding box and pins while placing macros. Combine PnR logic with custom macros using IP integration. Work with synthesized netlists and place the cells in timing/area. Handle floorplan and placement, optimizing for Power/Performance and Area. Perform clock tree synthesis to generate clock distribution to flops memories and other elements. Analyze PnR results, iterating and making sure parts can operate at performance frequency. Ensure PnR results are manufacturable. Automate the PnR flow, adding customization and collect metrics/results.



To apply, mail your resume & transcript(s) to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 6989498. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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