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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 09.27.21

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]

 

JOB ID:                 4254396

               

JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineer in CUPERTINO, California. Full chip and block level timing constraints and timing closure ownership throughout the entire project cycle (RTL, synthesis, and physical implementation). Develop and maintain methodology and flows related to timing constraints generation, timing verification and closure. Generation of block and full chip timing constraints. Analyze timing reports and utilize scripting techniques to develop insights and drive rapid timing closure. Support digital chip integration work and flows working closely with cross-functional teams (Design, Test, Physical Design).

 

CONTACT:

To apply, mail your resume & transcript(s) to: Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 4254396. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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