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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 01.10.22

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]


JOB ID:                 6636498


JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineer in Cupertino, CA and various unanticipated locations throughout the USA. Responsible for all phases of design of high performance microprocessor from Register Transfer Level (RTL) to final GDSII delivery. Perform front end implementation tasks such as structured datapath design, synthesis, logic equivalence check, power intent validation, and static timing analysis (STA). Collaborate with RTL team to perform feasibility analysis on suggested microarchitectures, including performance, area, timing, power, complexity and effort. Generate timing constraints for synthesis, place & route (PnR), and STA. Create floorplans including pin and macro placement and power grid. Perform PnR and close the design to meet timing, area and power constraints. Generate and implement ECOs to fix timing, noise, and EMIR violations. Run physical design verification flow and fix layout vs schematic (LVS) & Design Rule Checker (DRC) violations. Collaborate with CAD team to develop physical design methodologies.


CONTACT: To apply, mail your resume & transcript(s) to: Apple Inc., ATTN: S.L., 1 Infinite Loop 104-1GM, Cupertino, CA 95014, with reference to Job ID: 6636498. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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