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ASIC Design Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 09.19.22

EMPLOYER:        Apple Inc. 

JOB TITLE:          ASIC Design Engineer [Multiple Positions Available]


JOB ID:                5941529


JOB DESCRIPTION: Apple Inc. has multiple positions available for ASIC Design Engineers in Cupertino, CA. Responsible for all aspects of timing including timing methodology, timing analysis, convergence, closure, and final signoff. Perform detailed path analysis, chip floor planning, and time budgeting. Tasks include performing static timing analysis, noise analysis, Spice simulation of critical timing paths. Work with deep submicron process technologies. Work with process variation, various timing margins and derates, and detailed tool settings. Collaborate with Front-End and Physical Design Engineers for timing changes related to constraint debug/updates as well as detailed specifications and validation of design changes. Execute timing runs, maintain and innovate scripts and infrastructure, create timing engineering change orders (ECOs) for project tape-out and provide documentation for guidelines and specs. Apply strong signoff ownership to ensure first silicon success.


CONTACT: To apply, email your resume to:, with reference to Job ID: 5941529. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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