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Design Verification Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 11.14.22

EMPLOYER: Apple Inc.

JOB TITLE:          Design Verification Engineer [Multiple Positions Available]

JOB ID: 0543619  

JOB DESCRIPTION: Apple Inc. has multiple positions available for Design Verification Engineer in Cupertino, California and various unanticipated locations throughout the USA. Perform RTL Design Functional Verification of Wireless System on Chips (SoC). Develop UVM compliant Checkers, scoreboard, tests and sequences for Wireless SoC Blocks. Debug RTL, generate meaningful debug information and work with design team on closing bugs. Develop Object Oriented UVM Testbench infrastructure for SoC designs. Develop Object Oriented UVM testbench infrastructure ( UVC - UVM verification Components) for SoC blocks. Verify fabric designs which can support AXI, APB and AHB protocols (AMBA). Verify DDR Memory Controller design. Develop the block level test benches for trace and debug blocks. Develop the coverage models and work to reach the coverage goals.

CONTACT: To apply, email your resume to: jobadv@apple.com, with reference to Job ID: 0543619. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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