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Design Verification Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 03.06.23

EMPLOYER: Apple Inc.

JOB TITLE:          Design Verification Engineer [Multiple Positions Available]

JOB ID: 3332602  

JOB DESCRIPTION: Apple Inc. has multiple positions available for Design Verification Engineer in Cupertino, California and various unanticipated locations throughout the USA. Run Register-Transfer Level (RTL) and gate level functional verification. Debug failures, lead bug tracking, and analyze and close coverage. Develop test benching, complete constrained random test generation, failure analysis and resolution. Responsible for coverage analysis and flow development. Work with the design team to review specifications and architecture, extract features, define verification plans and coverage models, and improve methodology. Support mixed-signal co-simulation using Verilog models of analog intellectual property (IP). Develop test cases, reference models, coverage models and automation of regression suite. $161,000.00 - $242,000.00/yr.

CONTACT: To apply, email your resume to:, with reference to Job ID: 3332602. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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