JOB DESCRIPTION: Apple Inc. has multiple positions available for Design Verification Engineer in Cupertino, California. Design verification of the application-specific integrated circuit (ASIC) register-transfer level (RTL) hardware implementation using simulation tools and debugger. Design, develop test bench, write test plan, and write scenarios based on the test plan for architecture and micro-architecture. Write assertions, checkers, and scoreboards to verify the hardware protocol. Analyze the results from simulation via logs and waveforms for power and performance achieved by the design. Collect code coverage of the RTL and functional coverage for the stimulus, analyze gaps and write tests to fill the coverage holes. Create testbenches with monitors, checkers, scoreboards, and stimulus generators. Write test plan based on hardware architecture spec and write tests accordingly. Collect coverage and analysis for code and functional coverage holes. $105,500.00 - $159,000.00/yr.
CONTACT: To apply, email your resume to: jobadv@apple.com, with reference to Job ID: 1899598. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.
EMPLOYER: Apple Inc.
JOB TITLE: Design Verification Engineer [Multiple Positions Available]
JOB ID: 1899598
JOB DESCRIPTION: Apple Inc. has multiple positions available for Design Verification Engineer in Cupertino, California. Design verification of the application-specific integrated circuit (ASIC) register-transfer level (RTL) hardware implementation using simulation tools and debugger. Design, develop test bench, write test plan, and write scenarios based on the test plan for architecture and micro-architecture. Write assertions, checkers, and scoreboards to verify the hardware protocol. Analyze the results from simulation via logs and waveforms for power and performance achieved by the design. Collect code coverage of the RTL and functional coverage for the stimulus, analyze gaps and write tests to fill the coverage holes. Create testbenches with monitors, checkers, scoreboards, and stimulus generators. Write test plan based on hardware architecture spec and write tests accordingly. Collect coverage and analysis for code and functional coverage holes. $105,500.00 - $159,000.00/yr.
CONTACT: To apply, email your resume to: jobadv@apple.com, with reference to Job ID: 1899598. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.