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Design Verification Engineer [Multiple Positions Available]

Location: South Bay (Cupertino)         posted: 03.13.23

EMPLOYER: Apple Inc.

JOB TITLE:          Design Verification Engineer [Multiple Positions Available]

JOB ID: 7662545  

JOB DESCRIPTION: Apple Inc. has multiple positions available for Design Verification Engineer in Cupertino, California. Verify ASIC chipset for wireless communication system. Create testbench environment to verify architecture and functionality of pre-silicon hardware designs. Review specifications, develop attributes, tests, and coverage plan. Work with design and micro architecture teams to understand performance and functional goals of the design. Run regressions, and analyze code and functional coverage. Program in object oriented programming, C, C++, System Verilog, Python. Develop testbench using System Verilog and UVM. Understand logic design and computer architecture. Use constrained random verification process, functional coverage, code coverage, and assertion. Perform unreachability analysis and connectivity testing using formal verification tools. Develop verification environments with bus functional models, monitors, scoreboards and checkers. $161,000.00 - $242,000.00/yr.

CONTACT: To apply, email your resume to: jobadv@apple.com, with reference to Job ID: 7662545. Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.

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