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Hardware Engineer

Location: South Bay (Mountain View)         posted: 11.12.19

Interested candidates send resume to:  Google LLC, PO Box 26184 San Francisco, CA 94126 Attn: V. Murphy. Please reference job # below:

Hardware Engineer (Mountain View, CA) Design, develop, modify, &/or test hardware needed for various Google projects. #1615.42166 Exp Incl: C, C++, & Perl; Verilog, SystemVerilog, & SOC implement; verification of digital logic at RTL lvl using SystemVerilog for FPGAs, ASICs, & SOCs; verif digital sys using stand IP compnt & interconnects; UVM based ASIC dsgn verif method, low-power dsgns, clock& pwr-gating, DFT compnt, & multi-voltage dsgns; digital circuit & sys dsgns; performance verification of ASIC & SOC compnt; & sys test, characterize, & debug.

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