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Location: South Bay (San Jose)         posted: 01.15.21

Xilinx, Inc. in San Jose, CA seeks: 

 

Senior Design Engineer (job code 83763). Oversee definition, design, verification, and document for FPGA development. Participate in product development cycle… Reqs incl. MS or foreign equiv. in Electrical Engg, CE or related.

 

Senior Design Engineer (job code 84283). Research, design, develop, or test electronic components and systems. 10% travel, fully reimbursed. Reqs incl. MS or fgn equiv. in Electrical Engg, or rel + 3 yrs of rel exp, or a BS + 5 yrs of prog rel exp.

 

Sr. Software Engineer (job code 83677). Develop power estimation models and tools for all programmable devices at Xilinx. Reqs incl. BS or fgn equiv. in Electrical Engg, CE, CS, or rel + 2 yrs rel exp, or MS + 1 yr rel exp. 

 

Senior Staff Design Engineer (job code 84241). Research, design, develop, or test electronic components and systems. Reqs incl. MS or fgn equiv. in Mats Engg, Electrical Engg, or rel + 10 yrs of rel exp.

 

Senior Staff Design Engineer (job code 85455). Oversee definition, design, verification, and document for ASIC development.  Participate in defining specification, testing and verification of PHY/PLLs IPs, defining and designing micro-architecture, power, performance and area (PPA) targets/enhancements. Reqs incl. MS or foreign equiv. in Electronics Engg, Electrical Engg, CE or related + 8 yrs rel exp or BS + 10 yrs rel exp.

 

Senior Systems Design Engineer (job code 83734). Oversee definition, design, verification, and document for ASIC development. Enhance existing test software for system-level validation and verification of existing and new FPGA features. Reqs incl. BS or foreign equiv. in Information Technology, Electronics Engg, Electrical Engg, CS or related + 6 yrs prog rel exp.

 

Software Development Manager (job code 82718). Direct the software systems development function, including design, development, troubleshooting, and debugging of software programs for software enhancements and new products including cloud-based or internet-related tools. Reqs incl. MS or foreign equiv. in Electrical Engg, CE or related + 9 yrs rel exp.

 

Senior Design Engineer (job code 83854). Oversee definition, design, verification, and document for ASIC development. Create block level verification plan, test plans and full chip test plan. Reqs incl. MS or foreign equiv. in Electrical Engg, Electronics Engg, CS or related + 3 yrs rel exp or BS + 5 yrs prog rel exp.

 

Mail resume to Xilinx, Inc. Attn: Ask HR at 2100 Logic Drive, San Jose, CA 95124-3450. Must ref the relevant job code to be considered. EEO/AA/Vet/Disability Employer.

 

 

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